[akd4344-a] 2007/07 - 1 - general description the akd4344-a is an evaluation board for the AK4344, 24bit and 96khz dac with dit for portable and home audio systems. the akd4344-a has the interface with akm?s a/d converter evaluation boards and the interface with digital audio systems via optical connector. therefore, it is easy to evaluate the AK4344. ordering guide akd4344-a --- AK4344 evaluation board function ? compatible with 2 types of input data interface - direct interface with akm?s a/d converter evaluation boards via 10-pin header - on-board ak4112b as dir, which accepts optical or bnc inputs ? optical output for internal dit ? bnc connector for an external clock input ? bnc connector for dac output vdd agnd opt lout rout ak4112b (dir) mclk opt clock divider generator digital in digital out 74lvc541 10pin header dsp data vcc dgnd bnc analog out AK4344 figure 1. akd4344-a block diagram * circuit diagram and pcb layout are attached at the end of this manual. a k4344 evaluation board rev.2 a kd4344- a
[akd4344-a] 2007/07 - 2 - operation sequence 1) set up the power supply lines. [vdd] (red) = 2.7 3.6v (typ. 3.3v, for AK4344) [vcc] (red) = 2.7 3.6v (typ. 3.3v, for ak4112b, for 74lvc541 and for logic) [agnd] (black) = 0v [dgnd] (black) = 0v each supply line should be distributed from the power supply unit. 2) set-up the evaluation modes, jumper pins and dip switches (see the followings.) 3) power on. when ak4112b is used, the ak4112b and AK4344 should be reset once by bringing sw2 and sw1 ?l? upon power-up. when ak4112b is not used, keep sw2 to ?l?, and the AK4344 should be reset once by bringing sw1 ?l? upon power-up. evaluation mode 1) d/a part evaluation using optical or s/pdif input use port1 (rx1: opt) or j2 (rx1: bnc). the ak4112b (dir) generates mclk, bick, lrck and sdti1 from the received data through optical connector (torx141) or bnc connector. this evaluation mode should be used for the evaluation using cd test disk. nothing should be connected to port3 (dsp). the selection of opt and bnc should be done by jp14 (rx1) jp7 lrck jp4 mclk jp12 ext di r ext di r ex t jp5 bick di r ex t jp6 sdti1 2) d/a part evaluation using 10-pin connector on the akm?s a/d evaluation board use port3 (dsp). it is able to evaluate the AK4344, connecting the 10-pin connector on the akm?s a/d evaluation board and port3 (dsp) via 10-line flat cable. mclk, bick, lrck and sdti1 are sent from the a/d converter evaluation board to the akd4344 through port3 (dsp) via 10-line flat cable. jp7 lrck jp4 mclk jp12 ext di r ext di r ex t jp5 bick di r ext jp6 sdti1 3) d/a part evaluation using port3 (dsp), and supplying all interface signals from external equipments in case of using port3 (dsp), and supplying signals (mclk, bick, lrck, sdti1) that is needed for the AK4344 from external equipments, set up as following. jp7 lrck jp4 mclk jp12 ext di r ext di r ex t jp5 bick di r ext jp6 sdti1 in case of using port3 (dsp), and supplying sdti2 from external equipments, setting of sdti2 should be done by jp8 (sdti2).
[akd4344-a] 2007/07 - 3 - other jumper pins set up (1) jp15 (vdd): vdd and vcc open: separated short: common. (the connector ?vcc? can be open.) by opening the connector ?vcc?, shorting jp15 (vdd) and supplying 3.3v to the connector ?vdd?, the connector ?vdd? can supply 3.3v to all circuits (2) jp16 (gnd): analog ground and digital ground open: separated short: common. (the connector ?dgnd? can be open.) (3) jp10 (bcfs): select the bick of the AK4344 x1: bick=128fs in case of mclk=256fs/384fs/512fs/768fs. bick=64fs in case of mclk=192fs. x2: bick=64fs in case of mclk=128fs/256fs/384fs/512fs/768fs. bick=32fs in case of mclk=192fs. bick=128fs in case of mclk=1024fs/1536fs. x4: bick=32fs in case of mclk=128fs/256fs/384fs/512fs/768fs. bick=64fs in case of mclk=1024fs/1536fs. x8: bick=32fs in case of mclk=1024fs/1536fs. (4) jp11 (div), [jp9] (clk), [jp13] (lrfs) when using j1 (ext), these jumper pins should be set according to table 1. (5) jp2 (cdto / sdti2): select the signal of cdto / sdti2 pin cdto: select the cdto sdti2: select the sdti2 (6) jp8 (sdti2): select the input of sdti2 pin port3: input the signal from port3 gnd: input the ?0? data (when jp2 (cdto / sdti2): setting is cdto, set to gnd)
[akd4344-a] 2007/07 - 4 - example for external clock setting refer to the following setting when mclk, bick and lrck are supplied to the AK4344 from j1 (ext). mode fs mclk jp11 (div) jp9 (clk) jp13 (lrfs) 512fs = 4.096mhz x2 x2 x1 768fs = 6.144mhz x3 x2 x1 1024fs = 8.192mhz x2 x2 x2 8khz 1536fs = 12.288mhz x3 x2 x2 512fs = 12.288mhz x2 x2 x1 768fs = 18.432mhz x3 x2 x1 1024fs = 24.576mhz x2 x2 x2 half 24khz 1536fs = 36.864mhz x3 x2 x2 256fs = 2.048mhz x1 x2 x1 384fs = 3.072mhz open x3 x1 512fs = 4.096mhz x2 x2 x1 8khz 768fs = 6.144mhz x3 x2 x1 256fs = 8.192mhz x1 x2 x1 384fs = 12.288mhz open x3 x1 512fs = 16.384mhz x2 x2 x1 32khz 768fs = 24.576mhz x3 x2 x1 256fs = 11.2896mhz x1 x2 x1 default 384fs = 16.9344mhz open x3 x1 512fs = 22.5792mhz x2 x2 x1 44.1khz 768fs = 33.8688mhz x3 x2 x1 256fs = 12.288mhz x1 x2 x1 384fs = 18.432mhz open x3 x1 512fs = 24.576mhz x2 x2 x1 normal 48khz 768fs = 36.864mhz x3 x2 x1 128fs = 6.144mhz open x1 x1 192fs = 9.216mhz open x3 x3 256fs = 12.288mhz x1 x2 x1 48khz 384fs = 18.432mhz open x3 x1 128fs = 12.288mhz open x1 x1 192fs = 18.432mhz open x3 x3 256fs = 24.576mhz x1 x2 x1 double 96khz 384fs = 36.864mhz open x3 x1 table 1. clock setting
[akd4344-a] 2007/07 - 5 - dip switch set up [sw3]: setting the audio data format of the ak4112b (on=?h?, off=?l?) mode sw3-3 dif2 sw3-2 dif1 sw3-1 dif0 sdti format 0 l l l 16bit, lsb justified 3 l h h 24bit, lsb justified 4 h l l 24bit, msb justified 5 h l h 24bit, i 2 s compatible default table 2. sw3: audio data format of ak4112b note. the ak4112b does not support 16bit, i 2 s compatible.
[akd4344-a] 2007/07 - 6 - the function of the toggle sw [sw1] (AK4344-pdn): resets the AK4344. keep ?h? during normal operation. the AK4344 should be reset once by bringing sw1 ?l? upon power-up. [sw2] (ak4112b-pdn): resets the ak4112b. keep ?h? during normal operation. the ak4112b should be reset once by bringing sw2 ?l? upon power-up. analog output circuit the dac of AK4344 outputs analog audio signals through j3 and j4. + c13 22u r7 220 j3 bnc-r-pc 1 2 3 4 5 r9 10k + c17 22u r13 10k r12 220 j4 bnc-r-pc 1 2 3 4 5 c100 1n c101 1n lou t rou t AK4344-lout AK4344-rout figure 2. lout/rout output circuit * akemd assumes no responsibility for the trouble when using the above circuit examples. serial control the akd4344-a can be controlled via the printer port (parallel port) of ibm-at compatible pc. connect port4 (up-i/f) to pc by 10-line flat cable packed with the akd4 344-a. take care of the direction of connector. there is a mark at pin#1. the pin layout of port4 as shown figure 3. port4 up i/f 10 9 2 1 nc cdto cdti ccl k csn gnd gnd gnd gnd gnd red figure 3. port4 pin layout
[akd4344-a] 2007/07 - 7 - control software manual set-up of evaluation board and control software 1. set up the akd4344-a according to the operating sequence located on page 2. 2. connect ibm-at compatible pc with akd4344-a by 10-line type flat cable (packed with akd4344-a). take care of the direction of 10pin header. (please install the driver in the cd-rom when this control software is used on windows 2000/xp. please refer ?installation manual of c ontrol software driver by akm device control software?. in case of windows95/98/me, this installation is not needed. this control software does not operate on windows nt.) 3. insert the cd-rom labeled ?akd4344-a evaluation kit? into the cd-rom drive. 4. access the cd-rom drive and double-click the icon of ?akd4344-a.exe? to set up the control program. 5. please evaluate according to the following. operation flow keep the following flow. 1. set up the control program according to explanation above. 2. click ?port reset? button. explanation of each buttons 1. [port reset]: set up the usb interface board (akdusbif-a). 2. [write default]: initialize the register of AK4344. 3. [all write]: write all registers that is currently displayed. 4. [function1]: dialog to write data by keyboard operation. 5. [function2]: dialog to write data by keyboard operation. 6. [function3]: the sequence of register setting can be set and executed. 7. [function4]: the sequence that is created on [function3] can be assigned to buttons and executed. 8. [function5]: the register setting that is created by [save] function on main window can be assigned to buttons and executed. 9. [save]: save the current register setting. 10. [open]: write the saved values to all register. 11. [write]: dialog to write data by mouse operation. indication of data input data is indicated on the register map. red letter indicat es ?h? or ?1? and blue one indicates ?l? or ?0?. blank is the part that is not defined in the datasheet.
[akd4344-a] 2007/07 - 8 - explanation of each dialog 1. [write dialog] : dialog to write data by mouse operation there are dialogs corresponding to each register. click the [write] button corresponding to each register to set up the dialog. if you check the check box, data becomes ?h? or ?1?. if not, ?l? or ?0?. if you want to write the input data to AK4344, click [ok] button. if not, click [cancel] button. 2. [function1 dialog] : dialog to write data by keyboard operation address box: input registers ad dress in 2 figures of hexadecimal. data box: input registers da ta in 2 figures of hexadecimal. if you want to write the input data to AK4344, click [ok] button. if not, click [cancel] button. 3. [function2 dialog] : dialog to evaluate att address box: input registers address in 2 figures of hexadecimal. start data box: input starts data in 2 figures of hexadecimal. end data box: input end data in 2 figures of hexadecimal. interval box: data is written to AK4344 by this interval. step box: data changes by this step. mode select box: *if you check this check box, data reaches end data, and returns to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 *if you do not check this check box, data reaches end data, but does not return to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 if you want to write the input data to AK4344, click [ok] button. if not, click [cancel] button.
[akd4344-a] 2007/07 - 9 - 4. [save] and [open] 4-1. [save] save the current register setting data. the extension of file name is ?akr?. (operation flow) (1) click [save] button. (2) set the file name and push [save] button. the extension of file name is ?akr?. 4-2. [open] the register setting data saved by [save] is written to AK4344. the file type is the same as [save]. (operation flow) (1) click [open] button. (2) select the file (*.akr) and click [open] button.
[akd4344-a] 2007/07 - 10 - 5. [function3 dialog] the sequence of register setting can be set and executed. (1) click [f3] button. (2) set the control sequence. set the address, data and interval time. set ?-1? to the address of the step where th e sequence should be paused. (3) click [start] button. then this sequence is executed. the sequence is paused at the step of interval="-1". clic k [start] button, the sequence restarts from the paused step. this sequence can be saved and opened by [save] and [open] button on the function3 window. the extension of file name is ?aks?. figure 4. window of [f3]
[akd4344-a] 2007/07 - 11 - 6. [function4 dialog] the sequence that is created on [function3] can be assigne d to buttons and executed. when [f4] button is clicked, the window as shown in figure opens. figure 5. [f4] window
[akd4344-a] 2007/07 - 12 - 6-1. [open] buttons on left side and [start] buttons (1) click [open] button and select the sequence file (*.aks). the sequence file name is displayed as shown in figure . figure 6. [f4] window(2) (2) click [start] button, then the sequence is executed. 6-2. [save] and [open] buttons on right side [save]: the sequence file names can assign be saved. the file name is *.ak4. [open]: the sequence file names assign that are saved in *.ak4 are loaded. 6-3. note (1) this function doesn't support the pause function of sequence function. (2) all files need to be in same folder used by [save] and [open] function on right side. (3) when the sequence is changed in [function3], the file should be loaded again in order to reflect the change.
[akd4344-a] 2007/07 - 13 - 7. [function5 dialog] the register setting that is created by [save] function on main window can be assigned to buttons and executed. when [f5] button is clicked, the following window as shown in figure opens. figure 7. [f5] window 7-1. [open] buttons on left side and [write] button ( 1) click [open] button and select the register setting file (*.akr). (2) click [write] button, then the register setting is executed. 7-2. [save] and [open] buttons on right side [save] : the register setting file names assign can be saved. the file name is *.ak5 . [open] : the register setting file names as sign that are saved in *.ak5 are loaded. 7-3. note (1) all files need to be in same folder used by [save] and [open] function on right side. (3) when the register setting is changed by [save] button in main window, the file should be loaded again in order to reflect the change.
[akd4344-a] 2007/07 - 14 - measurement results [measurement condition] ? measurement unit : audio precision, system two cascade ? mclk : 512fs (fs=44.1khz) / 256fs (fs=96khz) ? bick : 64fs ? fs : 44.1khz / 96khz ? bw : 20hz~20khz (fs=44 .1khz) / 20hz~40khz (fs=96khz) ? bit : 24bit ? power supply : vdd = 3.3v ? interface : psia ? temperature : room [measurement results] parameter results unit dac analog output characteristics lch / rch s/(n+d) (fs=44.1khz, fin=1khz, 0dbfs) (fs=96khz, fin=1khz, 0dbfs) db db d-range (fs=44.1khz, fin=1khz, -60dbfs, a-weighted) (fs=96khz, fin=1khz, -60dbfs, a-weighted) db db s/n (fs=44.1khz, no-input, a-weighted) (fs=96khz, no-input, a-weighted) db db interchannel isolation (fin=1khz, 0dbfs/ no-input) db
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